1. Field of the Invention
The present invention relates generally to devices, systems and methods for measuring warpage of a sample, for example, a printed wiring board assembly (PWBA).
2. Description of Related Art
Over the years, chip package technologies have been improving in order to achieve smaller package sizes and higher density circuitry while requiring superior reliability. To meet the increased reliability requirements of chip packages, one crucial issue is warpage induced by the coefficient of thermal expansion (CTE) mismatches within chip packages and printed wiring boards (PWBs). Warpage takes place primarily during the reflow process when chip packages are soldered to PWBs in the reflow oven and later cooled down to room temperature as the assembled boards exit the oven. If induced warpage in chip packages or PWBs exceeds critical values, one of the resultant effects is component misregistration during component placement and insertion processes. The presence of warpage can also cause reliability problems in chip packages such as die cracking, underfill delamination, creep and voids in solder bumps, and fatigue failure in solder bumps resulting from high residual stresses. Several of these conditions are illustrated in FIG. 1.
The effects of warpage on the failure of chip packages have rendered warpage control a crucial process during the reflow process. To address this concern, the first step that can be taken is to measure warpage accurately and quickly. Several techniques for measuring the warpage of chip packages and boards (i.e., PWBs and PWB assemblies) have been developed. Among the various warpage measurement techniques, the digital fringe projection (DFP) technique has become popular for measuring the warpage of chip packages and boards because of its non-contact, full-field, and high-resolution measurement capabilities and the advancements in digital projection technology in recent years. The conventional measurement process using the DFP technique involves projecting sinusoidal fringe patterns onto the sample surface, capturing the fringe patterns reflected from the sample surface, which is phase modulated by the surface height distribution, generating a wrapped phase image from the captured fringe patterns by a fringe analysis method, unwrapping the wrapped phase to obtain a continuous phase distribution proportional to the surface height distribution, and converting the unwrapped phase distribution to the surface height distribution.
When using the DFP techniques for measuring the warpage of chip packages and boards, reflective painting is generally sprayed on the sample surface to ensure uniform surface reflectance and to obtain better fringe image contrasts in the measurement process. However, painted samples may no longer be re-used, and the spray-painting process is not suitable in assembly line.
It is the intention of the present invention to solve this problem and provide for such an industrial need with a dynamic digital fringe projection (DDFP) technique.